What You’ll Be Doing

• Verification of the ASIC design, architecture, golden models and micro-architecture using advanced verification methodologies such as UVM.
• Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
• Performance measurement and Gate Level Simulation

What We Need To See

• ASIC verification engineer with BSEE degree and 3+ years of experience;
• Writing detailed test plans from complex block specifications;
• Creating and maintaining block-level and chip-level test benches;
• Writing constrained random stimulus generators and assertion checkers;
• Writing bus functional simulation models;
• Expertise in System Verilog and UVM;
• Strong interpersonal skills and an excellent teammate;
• English language - at least medium level at reading/writing/speaking is required;

Ways You Can Stand Out From The Crowd

• Strong C/C++, Python or Tcl skills
• Good debugging and analytical skills

EasyIC provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at EasyIC.

If you think you are a good fit, please send your CV at This email address is being protected from spambots. You need JavaScript enabled to view it.